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   <div id="projectname">SA-PCB
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   <div id="projectbrief">Annealing-basedPCBplacementtool</div>
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<div class="title">SA-PCB </div>  </div>
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<div class="textblock"><p><em>SA-PCB: Simulated Annealing-based Placement For PCB Layout</em></p>
<h1><a class="anchor" id="autotoc_md4"></a>
Getting Started</h1>
<ul>
<li>See <a href="https://github.com/The-OpenROAD-Project/PCB-PR-App">https://github.com/The-OpenROAD-Project/PCB-PR-App</a></li>
</ul>
<h1><a class="anchor" id="autotoc_md5"></a>
Installation</h1>
<h2><a class="anchor" id="autotoc_md6"></a>
Pre-requisites</h2>
<ul>
<li>GCC compiler &gt;= 4.8.5</li>
<li>boost library &gt;= 1.62</li>
<li>cpp-taskflow &gt;= 2.0</li>
<li>Python &gt;= 3.6</li>
<li>shapely &gt;= 1.6.4</li>
<li>matplotlib &gt;= 3.0.2</li>
<li>docopt &gt;= 0.6.2</li>
<li>numpy &gt;= 1.15.4</li>
<li>argparse &gt;= 1.1</li>
<li>tqdm &gt;= 4.30.0 [python-multistart]</li>
<li>numba &gt;= 0.42.1 [python-multistart]</li>
<li>multiprocessing [python-multistart]</li>
<li>yaml</li>
<li>json</li>
<li>Recommended OS: Centos6, Centos7 or Ubuntu 16.04</li>
</ul>
<h2><a class="anchor" id="autotoc_md7"></a>
Clone repo and submodules</h2>
<p>$ git clone &ndash;recursive <a href="https://github.com/choltz95/c-pcb-annealer">https://github.com/choltz95/c-pcb-annealer</a> $ cd ~/c-pcbannealer $ pip install -r requirements.txt $ make install $ make</p>
<h2><a class="anchor" id="autotoc_md8"></a>
Fix eagle2bookshelf errors</h2>
<p>You may have to fix some Swoop errors. Download DRU.py and place into the eagle2bookshelf directory.</p>
<p>$ wget <a href="https://raw.githubusercontent.com/NVSL/Swoop/master/Swoop/DRU.py">https://raw.githubusercontent.com/NVSL/Swoop/master/Swoop/DRU.py</a> $ mv DRU.py eagle2bookshelf</p>
<h2><a class="anchor" id="autotoc_md9"></a>
Check your installation</h2>
<p>To make sure your installation is correct and the current tool version is stable enough, run a Hello World application:</p>
<p>$ make test $ open test.png</p>
<h2><a class="anchor" id="autotoc_md10"></a>
How to execute</h2>
<p>./sa parameters -i &lt;optional, value&gt; : for denoting # outer iterations PER SA INSTANCE -j &lt;optional, value&gt; : for denoting 'j'*#nodes inner iterations -t &lt;optional, value&gt; : for denoting initial temperature -f &lt;optional, str&gt; : for output filename -e &lt;optional, float&gt; : convergence epsilon -v &lt;optional&gt; : Ben-amur flag -x &lt;optional, int&gt; : simulated annealing instance index -p &lt;required, string&gt;: input placement board -d &lt;optional, {0-3}&gt; : debug verbosity -r &lt;optional, {0-3}&gt; : rotation EXAMPLE: ./sa -i 20000 -j 20 -t 1 -p input -f output</p>
<h2><a class="anchor" id="autotoc_md11"></a>
License</h2>
<ul>
<li>BSD-3-clause License [[Link]](LICENSE)</li>
</ul>
<h1><a class="anchor" id="autotoc_md12"></a>
Description</h1>
<p>C++ annealer for simple PCB placement of polygonal components. Supports the following:</p><ul>
<li>Analytical overlap for arbitrary polygons using boost geometries</li>
<li>Support 90 deg., 45 deg., free rotation [free rotation in progress]</li>
<li>HPWL cost term for wirelength</li>
<li>BEN-AMEUR et al. cost-normalization &amp; automatic initial temperature</li>
<li>Variable placement shift window, smaller displacement with temperature</li>
<li>Geometric temperature updates (cooling schedule) based on Timberwolf schedule</li>
<li>Bookshelf parser</li>
<li>Bookshelf version translator</li>
<li>Plotting &amp; animations</li>
</ul>
<h1><a class="anchor" id="autotoc_md13"></a>
Limitations / Current issues / In development</h1>
<ul>
<li>Parallel multistart [Issues with cpp-taskflow. Still support for multi-start via python script.]</li>
<li>R-Tree spatial indexing for fast overlap computation</li>
<li>Free rotation</li>
<li>Algorithm very sensitive to parameters</li>
<li>Broken support for weighted modules/nets</li>
<li>Set up Dockerfile</li>
<li>Support json configuration files for algorithm parameters</li>
</ul>
<h2><a class="anchor" id="autotoc_md14"></a>
Authors</h2>
<ul>
<li>Chester Holtz, Devon Merrill, James (Ting-Chou) Lin, Connie (Yen-Yi) Wu (Ph.D. advisor: Chung-Kuan Cheng, Steven Swanson).</li>
<li>Pull requests to improve the tool are very appreciated.</li>
</ul>
<h2><a class="anchor" id="autotoc_md15"></a>
Citations</h2>
<ul>
<li>Sechen, C. and Sangiovanni-Vincentelli, A. L., "The Timber-Wolf placement and routing package", IEEE J. Solid-State Circuits 30:510–522 1985.</li>
<li>Spindler, P. and Johannes, F., "Fast and Accurate Routing Demand Estimation for Efficient Routability-driven Placement
", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2007.</li>
<li>C.-K. Cheng, A. B. Kahng, I. Kang and L. Wang, "RePlAce: Advancing Solution Quality and Routability Validation in Global Placement", to appear in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018. (Digital <a class="el" href="class_object.html">Object</a> Identifier: 10.1109/TCAD.2018.2859220)</li>
<li>Ben-Ameur, Walid. "Computing the initial temperature of simulated annealing." Computational Optimization and Applications 29, no. 3 (2004): 369-385.</li>
<li>James M. Varanelli and James P. Cohoon. Two-stage simulated annealing methodology. In Proceedings of the 5th Great Lakes Symposium on VLSI, pages 50–53, Buffalo, NY, 16.-18. March 1995. IEEE, Los Alamitos, CA. †EI M153001/95</li>
<li>K. D. Boese A. B. Kahng and S. Muddu A new adaptive multistart technique for combinatorial global optimizations, Operations Research Letters, 16(2): 101-113, September, 1993. </li>
</ul>
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